MPC8240

Features: • Peripheral logic - Memory interface Programmable timing supporting either FPM DRAM, EDO DRAM, or SDRAM High-bandwidth bus (32- or 64-bit data bus) to DRAM Supports one to eight banks of 4-, 16-, 64-, or 128-Mbit memory devices Supports 1-Mbyte to 1-Gbyte DRAM memory 16 Mbyte...

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SeekIC No. : 004426094 Detail

MPC8240: Features: • Peripheral logic - Memory interface Programmable timing supporting either FPM DRAM, EDO DRAM, or SDRAM High-bandwidth bus (32- or 64-bit data bus) to DRAM Supports one to eight ...

floor Price/Ceiling Price

Part Number:
MPC8240
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

• Peripheral logic
  - Memory interface
     Programmable timing supporting either FPM DRAM, EDO DRAM, or SDRAM
     High-bandwidth bus (32- or 64-bit data bus) to DRAM
     Supports one to eight banks of 4-, 16-, 64-, or 128-Mbit memory devices
     Supports 1-Mbyte to 1-Gbyte DRAM memory
     16 Mbytes of ROM space
     8-, 32-, or 64-bit ROM
     Write buffering for PCI and processor accesses
     Supports normal parity, read-modify-write (RMW), or ECC
     Data-path buffering between memory interface and processor
     Low-voltage TTL logic (LVTTL) interfaces
     Port X: 8-, 32-, or 64-bit general-purpose I/O port using ROM controller interface with
programmable address strobe timing
  - 32-bit PCI interface operating up to 66 MHz
     PCI 2.1-compliant
     PCI 5.0-V tolerance
     Support for PCI locked accesses to memory
     Support for accesses to PCI memory, I/O, and configuration spaces
     Selectable big- or little-endian operation
     Store gathering of processor-to-PCI write and PCI-to-memory write accesses
     Memory prefetching of PCI read accesses
     Selectable hardware-enforced coherency
     PCI bus arbitration unit (five request/grant pairs)
     PCI agent mode capability



Specifications

Characteristic 1
Symbol
Range
Unit
Supply voltage-CPU core and peripheral logic
Supply voltage-memory bus drivers
Supply voltage-PCI and standard I/O buffers
Supply voltage-PLLs and DLL
Supply voltage-PCI reference
Input voltage 2
Operational die-junction temperature range
Storage temperature range
VDD
GVDD
OVDD
AVDD/AVDD2/LAVDD
LVDDD
Vin
Tj
Tstg
0.3 to 2.75
0.3 to 3.6
0.3 to 3.6
0.3 to 2.75
0.3 to 5.4
0.3 to 3.6
0 to 105
55 to 150
V
V
V
V
V
V



Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent damage to the device.
2. PCI inputs with LVDD = 5 V ± 5% V DC may be correspondingly stressed at voltages exceeding LVDD + 0.5 V DC.




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