MNDS16F95-X-RH

Storage Temperature Range Ceramic DIP .................................-65 C to +175 C
Lead TemperatureCeramic DIP (Soldering, 60 sec.) ..................................300 C
Maximum Power Dissipation at 25 C
(Note 2)
Ceramic J Package ................................................................................1274mW
Ceramic E Package................................................................................ 1800mW
Ceramic W & WG Packages..................................................................... 725mW
Supply Voltage..............................................................................................7.0V
Differential Input Voltage....................................................................+15V/-10V
Enable Input Voltage....................................................................................5.5V
Thermal Resistance
ThetaJA
8 pin Cerdip (J pkg) ..................................................................118 C/W @ 1.0W
20 pin LCC (E pkg) ......................................................................83 C/W @ 0.5W
10 pin Cerpak (W pkg) ..............................................................207 C/W @ 0.5W
Ceramic SOIC (WG pkg)............................................................ 207 C/W @ 0.5W
ThetaJC
8 pin Cerdip (J pkg) ..................................................................................14 C/W
20 pin LCC (E pkg) ...................................................................................17 C/W
10 pin Cerpak (W pkg)............................................................................. 18 C/W
Ceramic SOIC (WG pkg) ...........................................................................18 C/W
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of "Electrical Characteristics" provide conditions for actual device operation.
Note 2: *Derate J package 8.5mW/C above +25C. *Derate E package 12.1mW/C above +25C. *Derate W & WG packages 4.8mW/C above +25C.

The DS16F95 Differential Bus Transceiver is a monolithic integrated circuit designed for bidirectional data communication on balanced multipoint bus transmission lines. The Transceiver meets EIA standard RS-485 as well as RS-422A.

The DS16F95 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS16F95 features lower power, extended temperature range, and improved specifications.

The DS16F95 combines a TRI-STATE differential input line receiver, both of which operate from a single 5.0V power supply. The driver and receiver have an active Enable that can be externally connected to function as a direction control. The driver differential outputs and the receiver differential inputs are internally connected to form differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver is disabled or when Vcc = 0V. These ports feature wide positive and negative common mode voltage ranges, making the device suitable for multipoint applications in noisy environments.

The DS16F95 driver is designed to handle loads up to 60 mA of sink or source current. The driver features positive and negative current-limiting and thermal shutdown for protection from line fault conditions.

The DS16F95 can be used in transmission line applications employing the DS96F172 and DS96F174 quad differential line drivers and the DS96F173 and DS96F175 quad differential line receivers.