MN86063

Features: ·Pixels per line: between 16 and 4864 bits, in word (16-bit) increments.·Processing time per line: Individual pixels are processed within two system clock cycles. For a machine cycle of 10 MHz, processing the worst-case pattern for a 4096-bit line takes no more than 1 ms.·Time-shared, mu...

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MN86063 Picture
SeekIC No. : 004424710 Detail

MN86063: Features: ·Pixels per line: between 16 and 4864 bits, in word (16-bit) increments.·Processing time per line: Individual pixels are processed within two system clock cycles. For a machine cycle of 10...

floor Price/Ceiling Price

Part Number:
MN86063
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

·Pixels per line: between 16 and 4864 bits, in word (16-bit) increments.
·Processing time per line: Individual pixels are processed within two system clock cycles. For a machine cycle of 10 MHz, processing the worst-case pattern for a 4096-bit line takes no more than 1 ms.
·Time-shared, multiplex processing Support for time-shared, multiplex processing allows image I/O, enlargement/reduction processing, and coding/decoding to proceed concurrently for a group of lines. Image bus DMA transfers can also proceed concurrently with command processing.
·Multiple channels If lines consist of 2432 bits or fewer, commands can be processed simultaneously on two channels using time-sharing. These commands may be issued asynchronously.
·Bus configuration There are separate system and image buses. The latter features two independent master DMA channels; the former, four slave DMA channel pins.
·Image data I/O Image data I/O can use either the image or system bus.
·Byte conversion When the system bus is 16 bits wide, the chip can swap the upper and lower bytes of image or coded data. It can also swap the MSB and LSB.
·Memory management The chip includes pointer management for the image buffer connected to the image bus.
·Machine cycle The limit is 10 MHz. This means that the maximum input clock is twice this, or 20 MHz.



Application

Facsimile equipment


Pinout

  Connection Diagram


Description

The MN86063 is a high-speed LSI codec for compressing and decompressing facsimile images. Features of MN86063  include real-time printing to laser printers, built-in line memory, enlargement and reduction, and code conversion.




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