MN63121

Features: ·Memory organization: 64 ´ 16 bits·Floating gate memory cells·Function blocking erroneous writes·Low power consumption- Reads: max. 6.6 mW for VCC = 3.3 V- Standby: max. 66 mW for VCC = 3.3 V·Built-in self-timer for use in automatically erasing and writing·Built-in error correction...

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MN63121 Picture
SeekIC No. : 004424649 Detail

MN63121: Features: ·Memory organization: 64 ´ 16 bits·Floating gate memory cells·Function blocking erroneous writes·Low power consumption- Reads: max. 6.6 mW for VCC = 3.3 V- Standby: max. 66 mW for VC...

floor Price/Ceiling Price

Part Number:
MN63121
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

·Memory organization: 64 ´ 16 bits
·Floating gate memory cells
·Function blocking erroneous writes
·Low power consumption
- Reads: max. 6.6 mW for VCC = 3.3 V
- Standby: max. 66 mW for VCC = 3.3 V
·Built-in self-timer for use in automatically erasing and writing
·Built-in error correction circuit that guarantees 105 write cycles
·10-year data preservation period



Application

· Keyless entry systems, cordless telephones, storage for recognition and adjustment data for terminals, etc.


Pinout

  Connection Diagram


Description

The MN63121 is a 1K-bit EEPROM supporting serial I/O and operating on a single power supply with a voltage between 1.8 and 5.5 V. MN63121 provides the following pins for easy interfacing to microprocessors or microcontrollers: chip select (CS), serial clock (SCK), data input (DI), data output (DO), reset (RESET), and busy (RDY/BUSY). It includes a built-in timer for use in automatically erasing and writing data during data updateoperations.

The memory organization is 64 ´ 16 bits. The MN63121 chip indicates the end of a write operation with either the RDY/ BUSY pin or the state of the DO pin after the status output mode has been set.Conversion of peripheral circuits to CMOS realizes great reductions in power consumption. Use of floating gate memory cells and a built-in error correction circuit ensures reliable operation for 105 write cycles.




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