MN63112S

Features: ·Choice of memory organizations: 256 ´ 8 bits and·128 ´ 16 bits·Floating gate memory cells·Function blocking erroneous writes·Low power consumption- Reads: max. 6.6 mW for VCC = 3.3 V- Standby: max. 66 mW for VCC = 3.3 V·Built-in self-timer for use in automatically erasing an...

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SeekIC No. : 004424647 Detail

MN63112S: Features: ·Choice of memory organizations: 256 ´ 8 bits and·128 ´ 16 bits·Floating gate memory cells·Function blocking erroneous writes·Low power consumption- Reads: max. 6.6 mW for VCC ...

floor Price/Ceiling Price

Part Number:
MN63112S
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/26

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Product Details

Description



Features:

·Choice of memory organizations: 256 ´ 8 bits and
·128 ´ 16 bits
·Floating gate memory cells
·Function blocking erroneous writes
·Low power consumption
- Reads: max. 6.6 mW for VCC = 3.3 V
- Standby: max. 66 mW for VCC = 3.3 V
·Built-in self-timer for use in automatically erasing and writing
·Built-in error correction circuit that guarantees 105 write cycles
·10-year data preservation period



Application

·Keyless entry systems, cordless telephones, storage for recognition and adjustment data for terminals, etc.


Pinout

  Connection Diagram


Description

The MN63112S is a 2K-bit EEPROM supporting serial I/O and operating on a single power supply with a voltage between 1.8 and 5.5 V. MN63112S provides the following pins for easy interfacing to microprocessors or microcontrollers: chip select (CS), serial clock (SK), data input (DI), and data output (DO). It includes a built-in timer for use in automatically erasing and writing data during data update operations.

The ORG pin of MN63112S provides a choice of two memory organizations: 256 ´ 8 bits when ORG is connected to ground and 128 ´ 16 bits when ORG is connected to VCC. An internal pull-up resistor makes the latter the default configuration. Conversion of peripheral circuits to CMOS realizes great reductions in power consumption. Use of floating gate memory cells and a built-in error correction circuit ensures reliable operation for 105 write cycles.




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