Features: New Features of TMOS V· On-resistance Area Product about One-half that of Standar MOSFETs with New Low Voltage, Low RDS(on) Tchnology·Faster Switching than E-FET PredecessorFeatures Common to TMOS V and TMOS E-FET· Avalanche Energy Specified· IDSS and VDS(on) Specified at Elevated Temper...
MMFT3055VL: Features: New Features of TMOS V· On-resistance Area Product about One-half that of Standar MOSFETs with New Low Voltage, Low RDS(on) Tchnology·Faster Switching than E-FET PredecessorFeatures Common...
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New Features of TMOS V
· On-resistance Area Product about One-half that of Standar MOSFETs with New Low Voltage, Low RDS(on) Tchnology
· Faster Switching than E-FET Predecessor
Features Common to TMOS V and TMOS E-FET
· Avalanche Energy Specified
· IDSS and VDS(on) Specified at Elevated Temperature
· Static Parameters are the Same for both TMOS V and TMOS E¤CFE
· Available in 12 mm Tape & Reel
Use MMFT3055VLT1 to order the 7 inch/1000 unit reel
Use MMFT3055VLT3 to order the 13 inch/4000 unit reel
Rating |
Symbol |
Value |
Unit |
Drain-to-Source Volta |
VDSS |
60 |
Vdc |
Drain-to-Gate Voltage (RGS = 1.0 M) |
VDGR |
60 |
Vdc |
Gate-to-Source Voltage - Continu Gate-to-Source Voltag- Non-repetitive ( tp 10 ms) |
VGS |
15 |
Vdc |
Drain Current - Continuou Drain Current - Continuous @ 10 Drain Current - Single Pulse ( tp 10 ?s) |
ID |
1.5 |
Adc |
Total PD @ TA = 25 mounted on 1" sq. Drain pad on FR-4 bd materi Total PD @ TA = 25 mounted on 0.70" sq. Drain pad on FR-4 bd mater Total PD @ TA = 25 mounted on min. Drain pad on FR-4 bd materia Derate above 25 |
PD |
2.1 |
Watts |
Operating and Storage Temperature Range |
TJ , Tstg |
-55 to 175 |
|
Single Pulse Drain-to-Source Avalanche Energy - Startin TJ = 25 (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 3.4 Apk, L = 10 mH, RG = 25 ) |
EAS |
58 |
mJ |
Thermal Resistance - Junction to Ambient on 1" sq. Drain pad on FR-4 bd mater - Junction to Ambient on 0.70" sq. Drain pad on FR-4 bd mater - Junction to Ambient on min. Drain pad on FR-4 bd materi |
RJA |
70 |
/W |
Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds |
TL |
260 |
Designer'fls Data for "orst Case" Condition -The Designers Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves-"representin boundaries on device characteristics - are given to facilitate "worst case" desig E-FET, Designers, and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
MMFT3055VL is a new technology designed to achieve an on-resi-tance area product about one-half that of standard MOSFEs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E-FE designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these MMFT3055VLs are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.