PinoutDescriptionThe ML6651CH is designed as auto-negotiating media converter. It supports conversion between 10BASE-T and 10BASE-FL, between 100BASE-TX and 100BASE-FX/SX, and between FLP (fast link pulse) bursts and FLNP (fiber link negotiation pulse) bursts. Either 850nm or 1300nm laser optics o...
ML6651CH: PinoutDescriptionThe ML6651CH is designed as auto-negotiating media converter. It supports conversion between 10BASE-T and 10BASE-FL, between 100BASE-TX and 100BASE-FX/SX, and between FLP (fast link...
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The ML6651CH is designed as auto-negotiating media converter. It supports conversion between 10BASE-T and 10BASE-FL, between 100BASE-TX and 100BASE-FX/SX, and between FLP (fast link pulse) bursts and FLNP (fiber link negotiation pulse) bursts. Either 850nm or 1300nm laser optics of ML6651CH can be used for both 10 and 100 Mb/second operating data rates while fully auto-negotiating for speed and duplex mode communication. One or both of the fiber optic and twisted pair interfaces of ML6651CH can be set to interface with industry standard 1x9 fiber optic PMD modules, using PECL or LVPECL compatible modes. Its operating temperature range is fron 0°C to 70°C and its package is 44 pin TQFP (10 x 10 x 1.4mm body).
ML6651CH has eight features. (1) Complete implementation of fiber optic and twisted pair media interface. (2) ISO/IEC 8802.3, IEEE 802.3 and TIA/EIA-785 compliance, including full auto-negotiation for twisted pair and fiber optic media. (3) 850nm, 1300nm and 1x9 PMD modules. (4) Supports 1:1 receiver/transmitter transformer ratio for twisted pair. (5) Low latency 10Mb/s path. (6) Integrated voltage and current references. (7) Integrated twisted pair output wave shaping eliminate external filtering. (8) Integrated twisted pair 10BASE-T input filter and 100BASE-TX equalizer with baseline wander correction circuit. That are all the main features.
Also some pin descriptions about ML6651CH. (1) Pin 28 GNDFC is ground for one PLL, part of the scrambler, fiber optic LED driver, and quantizer. (2) Pin 34 is GNDQ is ground for the data quantizer and central bias. (3) Pin 35 GNDB is ground for part of the central biasing. (4) Pin 9 VCCE is power supply for the equalizer, one PLL and part of the descrambler and twisted pair driver. (5) Pin 19 VCCD is power supply for CMOS noisy circuits. And so on. If you have any question or suggestion or want to know more information about ML6651CH please contact us for details. Thank you!