MCM69P735

The MCM69P735 is a 4M bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the PowerPCE and other high performance microprocessors. It is organized as 128K words of 36 bits each. This device integrates input registers, an output register, a 2bit address counter, and a high speed SRAM onto a single monolithic circuit for reduced parts count in cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K).

Addresses (SA), data inputs (DQx) of the MCM69P735, and all control signals except output enable (G) and linear burst order (LBO) are clock (K) controlled through positive edgetriggered noninverting registers.

Bursts of the MCM69P735 can be initiated with either ADSP or ADSC input pins. Subsequent burst addresses can be generated internally by the MCM69P735 (burst sequence operates in linear or interleaved mode dependent upon the state of LBO) and controlled by the burst address advance (ADV) input pin.

Write cycles of the MCM69P735 are internally selftimed and are initiated by the rising edge of the clock (K) input. This feature eliminates complex offchip write pulse generation and provides increased timing flexibility for incoming signals.

Synchronous byte write (SBx) of the MCM69P735, synchronous global write (SGW), and synchronous write enable (SW) are provided to allow writes to either individual bytes or to all bytes. The four bytes are designated as "a", "b", "c", and "d". SBa controls DQa, SBb controls DQb, etc. Individual bytes are written if the selected byte writes SBx are asserted with SW. All bytes are written if either SGW is asserted or if all SBx and SW are asserted.

For read cycles, pipelined SRAMs output data is temporarily stored by an edgetriggered output register and then released to the output buffers at the next rising edge of clock (K).

The MCM69P735 operates from a 3.3 V core power supply and all outputs operate on a 3.3 V or 2.5 V power supply. All inputs and outputs are JEDEC standard JESD85 compatible.