Specifications Rating Symbol Value Unit Core Supply Voltage VDD 0.5 to + 4.6 V Output Supply Voltage VDDQ 0.5 to VDD + 0.5 V Voltage On Any Pin Vin 0.5 to VDD + 0.5 V Input Current (per I/O) Iin ± 50 mA Output Current (per I/O) Iout ± 70 mA Power Dissipa...
MCM69L738A: Specifications Rating Symbol Value Unit Core Supply Voltage VDD 0.5 to + 4.6 V Output Supply Voltage VDDQ 0.5 to VDD + 0.5 V Voltage On Any Pin Vin 0.5 to VDD + 0.5 V ...
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Rating | Symbol | Value | Unit |
Core Supply Voltage | VDD | 0.5 to + 4.6 | V |
Output Supply Voltage | VDDQ | 0.5 to VDD + 0.5 | V |
Voltage On Any Pin | Vin | 0.5 to VDD + 0.5 | V |
Input Current (per I/O) | Iin | ± 50 | mA |
Output Current (per I/O) | Iout | ± 70 | mA |
Power Dissipation (See Note 2) |
PD | - | W |
Operating Temperature | TA | 0 to + 70 | °C |
Temperature Under Bias | Tbias | 10 to + 85 | °C |
Storage Temperature | Tstg | 55 to + 125 | °C |
The MCM69L738A/820A is a 4 megabit synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch,Telecom, and other high speed memory applications. The MCM69L820A organized as 256K words by 18 bits, and the MCM69L738A organized as 128Kwords by 36 bits wide are fabricated in Motorola's high performance silicon gate BiCMOS technology.
The differential CK clock inputs control the timing of read/write operations of the RAM. At the rising edge of the CK clock all addresses, write enables, and synchronous selects are registered. An internal buffer and special logic enable the memory to accept write data on the rising edge of the CK clock a cycle after address and control signals. Read data is available at the falling edge of the CK clock. The RAM uses 2.5 V inputs and outputs.The synchronous write and byte enables allow writing to individual bytes or the entire word.