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MCM67Q709A

Features: • Single 5 V ± 5% Power Supply• Fast Cycle Time: 10 ns Max• Single Clock Operation• TTL Input and Output Levels (Outputs LVTTL Compatible)• Address, Data Input, E, W, G Registers OnChip• 100 MHz Maximum Clock Cycle Time• SelfTimed Write• Se...

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SeekIC No. : 004417887 Detail

MCM67Q709A: Features: • Single 5 V ± 5% Power Supply• Fast Cycle Time: 10 ns Max• Single Clock Operation• TTL Input and Output Levels (Outputs LVTTL Compatible)• Address, Data Inpu...

MCM67Q709A Data Sheet

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Part Number:
MCM67Q709A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Single 5 V ± 5% Power Supply
• Fast Cycle Time: 10 ns Max
• Single Clock Operation
• TTL Input and Output Levels (Outputs LVTTL Compatible)
• Address, Data Input, E, W, G Registers OnChip
• 100 MHz Maximum Clock Cycle Time
• SelfTimed Write
• Separate Data Input and Output Pins
• TransparentWrite and PassThrough
• High Output Drive Capability: 50 pF/Output at Rated Access Time
• Boundary Scan Implementation
• PBGA Package for High Speed Operation


Pinout

Connection Diagram Connection Diagram


Specifications

Rating
Symbo
Value
Unit
Power Supply Voltage
VCC
0.5 to + 7.0
V
Voltage Relative to VSS for Any Pin
Except VCC
Vin, Vout
0.5 to VCC + 0.5
V
Output Current
Iout
± 30
mA
Power Dissipation
PD
1.5
W
Temperature Under Bias
Tbias
10 to + 85
°C
Operating Temperature
TA
0 to + 70
°C
Storage Temperature - Plastic
Tstg
55 to + 125
°C



Description

The MCM67Q709A is a 1,179,648bit static random access memory, orga- nized as 131,072 words of 9 bits. It features separate TTL input and output buff- ers, which drive 3.3 V output levels and incorporates input and output registers onboard with high speed SRAM. It also features transparentwrite and data passthrough capabilities.

The synchronous design of the MCM67Q709A allows for precise cycle control with the use of an external single clock (K). The addresses (A0 A16), data input (D0 D8), data output (Q0 Q8), write enable (W), chip enable (E), and output enable (G), are registered in on the rising edge of clock (K).




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