Features: • Single 3.3 V ± 0.3 V Power Supply• Fast Access Time: 10, 12, 15 ns• Equal Address and Chip Enable Access Time• All Inputs and Outputs are TTL Compatible• Data Byte Control• Fully Static Operation• Power Operation: 140/135/130 mA Maximum, Active...
MCM6323A: Features: • Single 3.3 V ± 0.3 V Power Supply• Fast Access Time: 10, 12, 15 ns• Equal Address and Chip Enable Access Time• All Inputs and Outputs are TTL Compatible• Da...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
The MCM6323A is a 1,048,576 bit static random access memory organized as 65,536 words of 16 bits. Static design eliminates the need for external clocks or timing strobes; CMOS circuitry reduces power consumption and provides for greater reliability.
The MCM6323A is equipped with chip enable (E), write enable (W), and output enable (G) pins, allowing for greater system flexibility and eliminating bus contention problems. Separate byte enable controls (LB and UB) allow individual bytes to be written and read. LB controls the 8 DQa bits, while UB controls the 8 DQb bits.
The MCM6323A is available in a 400 mil smalloutline Jleaded (SOJ) package and a 44lead TSOP Type II package in copper leadframe for optimum printed circuit board (PCB) reliability.