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MC9RS08KA8

Features: • 8-Bit RS08 Central Processor Unit (CPU) Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature range of 40°C to 85°C Subset of HC08 instruction set with added BGND instruction• On-Chip Memory 8 KB flash read/program/erase over full operating voltage and temperature; KA4 has ...

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SeekIC No. : 004417370 Detail

MC9RS08KA8: Features: • 8-Bit RS08 Central Processor Unit (CPU) Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature range of 40°C to 85°C Subset of HC08 instruction set with added BGND instruction•...

MC9RS08KA8 Data Sheet

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Part Number:
MC9RS08KA8
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• 8-Bit RS08 Central Processor Unit (CPU)
Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature
  range of 40°C to 85°C
Subset of HC08 instruction set with added BGND instruction
• On-Chip Memory
8 KB flash read/program/erase over full operating
  voltage and temperature; KA4 has 4 KB flash
254 byte random-access memory (RAM); KA4 has 126 byte RAM
Security circuitry to prevent unauthorized access to
  RAM and flash contents
• Power-Saving Modes
Wait and stop
Wakeup from power-saving modes using real-time
  interrupt (RTI), KBI, or ACMP
• Clock Source Options
Oscillator (XOSC) - Loop-Control Pierce oscillator;
  crystal or ceramic resonator range of 31.25 kHz to
  39.0625 kHz or 1 MHz to 5 MHz
Internal Clock Source (ICS) - Internal clock source
  module containing a frequency-locked-loop (FLL)
  controlled by internal or external reference; precision
  trimming of internal reference allows 0.2% resolution
  and 2% deviation over temperature and voltage;
  supports bus frequencies up to 10 MHz
• System Protection
Watchdog computer operating properly (COP) reset
  with option to run from dedicated 1 kHz internal clock
  source or bus clock
Low-Voltage detection with reset or interrupt
Illegal opcode detection with reset
Illegal address detection with reset
Flash block protection
• Development Support
Single-Wire background debug interface
Breakpoint capability to allow single breakpoint setting
  during in-circuit debugging
• Peripherals
ADC - 12-channel, 10-bit resolution; 2.5 s
  conversion time; automatic compare function; operation
  in stop; fully functional from 2.7 V to 5.5 V (8-channels
  available on 16-pin package)
TPM - One 2-channel; selectable input capture, output
  compare, or buffered edge- or center-aligned PWM on each channel
IIC - Inter-Integrated circuit bus module capable of
  operation up to 100 kbps with maximum bus loading;
  capable of higher baudrates with reduced loading
MTIM1 and MTIM2 - Two 8-bit modulo timers
KBI - Keyboard interrupts with rising or falling edge
  detect; eight KBI ports in 16-pin and 20-pin packages
ACMP - Analog comparator: full rail-to-rail supply
  operation; option to compare to fixed internal bandgap
  reference voltage; can operate in stop mode
• Input/Output
14/18 GPIOs including one output only pin and one input only pin
Hysteresis and configurable pullup device on all input
  pins; configurable slew rate and drive strength on all output pins
• Package Options
16-pin, 20-pin SOIC or PDIP


Pinout

Connection Diagram


Specifications

Rating Symbol Value Unit
Supply voltage VDD 0.3 to 5.8 V
Maximum current into VDD IDD 120 mA
Digital input voltage VIn 0.3 to VDD + 0.3 V
Instantaneous maximum current
Single pin limit (applies to all port pins)1, 2, 3		 ID ±25 mA
Storage temperature range Tstg 55 to 150 °C
1 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two
resistance values.
2 All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP pin which is internally
clamped to VSS only.
3 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are:
if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.


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