MC88200

Description The MC88200 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory management and data caching.The memory management unit(MMU) efficiently supports a demand-paged virtual memory environment with two logical address ranges(user/supervisor) of 4 Gbytes each.Trans...

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SeekIC No. : 004417331 Detail

MC88200: Description The MC88200 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory management and data caching.The memory management unit(MMU) efficiently supports a demand-page...

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Part Number:
MC88200
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Description

The MC88200 CMMU is a high-performance, HCMOS VLSI device providing zero-wait-state memory management and data caching.The memory management unit(MMU) efficiently supports a demand-paged virtual memory environment with two logical address ranges(user/supervisor) of 4 Gbytes each.Translated addresses are provided by one of two address translation caches(ATCs), provding address translation in one clock cycle for most memory accesses.The page address translation cache(PATC) is a 56-entry, fully associative cache containing recently used translation cache containing recently used translation for 4-Kbyte memory pages and is maintained by MC88200 hardware.

Features of the mMU portion of the MC88200 are(1)two logical address spaces of 4 Gbytes each(user/supervisor); (2)automatically maintained PATC and software-maintained BATC; (3)write protection for user and supervisor accesses; (4)used and modified flags maintained in page translation tables; (5)probe capability for testing the status of a memory location.

Features of cache portion of MC88200 are(1)16-Kbyte, four-way, set-associative physical cache; (2)zero-wait-state physical cache accesses-address translation inparalle with cache access; (3)LRU(least recently used) replacement alogrithm for each cache set; (4)cache entries allocated with copyback or writethrough policies.




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