MBM29LV320TE 80

Features: • 0.23 mm Process Technology• Single 3.0 V Read, Program, and Erase Minimized system level power requirements• Compatible with JEDEC-standard Commands Use the same software commands as E2PROMs• Compatible with JEDEC-standard Worldwide Pinouts-48-pin TSOP (1) (Pack...

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MBM29LV320TE 80 Picture
SeekIC No. : 004414164 Detail

MBM29LV320TE 80: Features: • 0.23 mm Process Technology• Single 3.0 V Read, Program, and Erase Minimized system level power requirements• Compatible with JEDEC-standard Commands Use the same softwa...

floor Price/Ceiling Price

Part Number:
MBM29LV320TE 80
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• 0.23 mm Process Technology
• Single 3.0 V Read, Program, and Erase Minimized system level power requirements
• Compatible with JEDEC-standard Commands Use the same software commands as E2PROMs
• Compatible with JEDEC-standard Worldwide Pinouts
-48-pin TSOP (1) (Package suffix : TN - Normal Bend Type, TR - Reversed Bend Type)
-63-ball FBGA (Package suffix : PBT)
• Minimum 100,000 Program/Erase Cycles
• High Performance 80 ns maximum access time
• Sector Erase Architecture
-Eight 4 K word and sixty-three 32 K word sectors in word mode
-Eight 8 K byte and sixty-three 64 K byte sectors in byte mode
-Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture T = Top sector B = Bottom sector
• HiddenROM Region
-256 byte of HiddenROM, accessible through a new "HiddenROM Enable" command sequence
-Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC Input Pin
-At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status
-At VACC, increases program performance
• Embedded EraseTM* Algorithms Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM* Algorithms Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion
• Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit £ 2.5 V
• Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same
• Sector group protection Hardware method disables any combination of sector groups from program or erase operations
• Sector Group Protection Set function by Extended sector group protection command
• Fast Programming Function by Extended Command
• Temporary sector group unprotection Temporary sector group unprotection via the RESET pin.
• In accordance with CFI (Common Flash Memory Interface)



Specifications

Parameter
Conditions
Rating
Units
Min
Max
Storage Temperature
Tstg
55
+125
°C
Ambient Temperature with Power Applied
TA
40
+85
°C
Voltage with Respect to Ground All Pins except
A9, OE, RESET *1, *2
VIN, VOUT
0.5
VCC+0.5
V
Power Supply Voltage *1
VCC
0.5
+4.0
V
A9, OE, and RESET *1, *3
VIN
0.5
+13.0
V
WP/ACC *1, *4
VACC
0.5
+10.5
V



Description

The MBM29LV320TE 80 is 32 M-bit, 3.0 V-only Flash memory organized as 4 M bytes of 8 bits each or 2 M words of 16 bits each. The device is offered in a 48-pin TSOP (1) and 63-ball FBGA packages. MBM29LV320TE 80 is designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The device can also be reprogrammed in standard EPROM programmers.

The standard device offers access times 80 ns, 90 ns and 100 ns, allowing operation of high-speed microprocessors without wait state. To eliminate bus contention the device has separate chip enable(CE), write enable(WE) and output enable (OE) controls.




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