Features: n FEATURES• Single 5.0 V read, write, and eraseMinimizes system level power requirements• Compatible with JEDEC-standard commandsPinout and software compatible with single-power supply FlashSuperior inadvertent write protection• 48-pin TSOP, 40-pin SON• Minimum 10...
MBM29F017A-70/-90/-12: Features: n FEATURES• Single 5.0 V read, write, and eraseMinimizes system level power requirements• Compatible with JEDEC-standard commandsPinout and software compatible with single-powe...
SeekIC Buyer Protection PLUS - newly updated for 2013!
268 Transactions
All payment methods are secure and covered by SeekIC Buyer Protection PLUS.
The MBM29F017A-70/-90/-12 is a 16M-bit, 5.0 V-Only Flash memory organized as 2M bytes of 8 bits each. The 2M bytes of data is divided into 32 sectors of 64K bytes for flexible erase capability. The 8 bit of data will appear on DQ0 to DQ7. The MBM29F017A is offered in a 48-pin TSOP package. This device is designed to be programmed in- system with the standard system 5.0 V VCC supply. A 12.0 V VPP is not required for program or erase operations. The device can also be reprogrammed in standard EPROM programmers.
The standard MBM29F017A-70/-90/-12 offers access times between 70 ns and 120 ns allowing operation of high-speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable CE, write enable WE, and output enable OE controls.
The MBM29F017A-70/-90/-12 is command set compatible with JEDEC standard single-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0 V Flash or EPROM devices.
The MBM29F017A-70/-90/-12 is programmed by executing the program command sequence. This will invoke the Embedded ProgramTM Algorithm which is an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase is accomplished by executing the erase command sequence. This will invoke the Embedded EraseTM Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed before executing the eraseoperation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.
This device also features a sector erase architecture. The sector erase mode allows for sectors of memory to be erased and reprogrammed without affecting other sectors. A sector is typically erased and verified within one second (if already completely preprogrammed). The MBM29F017A is erased when shipped from the factory.
The MBM29F017A device also features hardware sector group protection. This feature will disable both program
and erase operations in any combination of eight sector groups of memory. A sector group consists of four
adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31.Fujitsu has implemented an Erase Suspend feature that enables the user to put erase on hold for any period of time to read data from or program data to a non-busy sector. Thus, true background erase can be achieved
MBM29F017A-70/-90/-12 features single 5.0 V power supply operation for both read and program functions. Internally generated and regulated voltages are provided for the program and erase operations. A low VCC detector automatically inhibits write operations during power transitions.
The end of program or erase is detected by Dat Polling of DQ7, or by the Toggle Bit I feature on DQ6 or RY/BY output pin. Once the end of a program or erase cycle has been completed, the device automatically resets to the read mode. The MBM29F017A-70/-90/-12 also has a hardware RESET pin. When this pin is driven low, execution of any Embedded Program or Embedded Erase operations will be
terminated. The internal state machine will then be reset into the read mode. The RESET pin may be tied to the system reset circuity. Therefore, if a system reset occurs during the Embedded Program or Embedded Erase operation, the device will be
automatically reset to a read mode. This will enable the systemmicroprocessor to read the boot-up firmware from the Flashmemory.
Fujitsu's Flash technology combines years of EPROM and E2PROM experience to produce the highest levels of quality, reliability, and cost effectiveness. The MBM29F017A-70/-90/-12 memory electrically erases all bits within a sectorsimultaneously via Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using the EPROMprogramming mechanism of hot electron injection.