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MBM29DL32XTE/BE80

Features: • 0.23 mm Process Technology• Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes (Refer to MBM29DL32XTE/BE Device Bank Divisions in n FEATURES )-Host system can program or erase in one bank, then immediately and simultaneous...

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SeekIC No. : 004414078 Detail

MBM29DL32XTE/BE80: Features: • 0.23 mm Process Technology• Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes (Refer to MBM29DL32XTE/BE Device Bank Divisio...

MBM29DL32XTE/BE80 Data Sheet

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Part Number:
MBM29DL32XTE/BE80
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

• 0.23 mm Process Technology
• Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes (Refer to "MBM29DL32XTE/BE Device Bank Divisions" in "n FEATURES")
-Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
-Zero latency between read and write operations
-Read-while-erase
-Read-while-program
• Single 3.0 V read, program, and erase Minimizes system level power requirements
• Compatible with JEDEC-standard commands Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
-48-pin TSOP (1) (Package suffix : TN - Normal Bend Type, TR - Reversed Bend Type)
-63-ball FBGA (Package suffix : PBT)
• Minimum 100,000 program/erase cycles
• High performance 80 ns maximum access time
• Sector erase architecture
-Eight 4 Kword and sixty-three 32 Kword sectors in word mode
-Eight 8 Kbyte and sixty-three 64 Kbyte sectors in byte mode
-Any combination of sectors can be concurrently erased. Also supports full chip erase.
• Boot Code Sector Architecture T = Top sector B = Bottom sector
• HiddenROM region
-64 Kbyte of HiddenROM, accessible through a new "HiddenROM Enable" command sequence
-Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC input pin
-At VIL, allows protection of boot sectors, regardless of sector group protection/unprotection status
-At VACC, increases program performance
• Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle completion
• Automatic sleep mode When addresses remain stable, automatically switch themselves to low power mode.
• Low VCC write inhibit £ 2.5 V
• Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Sector group protection  Hardware method disables any combination of sector groups from program or erase operations
• Sector Group Protection Set function by Extended sector group protection command
• Fast Programming Function by Extended Command
• Temporary sector group unprotection Temporary sector group unprotection via the RESET pin.
• In accordance with CFI (Common Flash Memory Interface)


Specifications

Parameter
Conditions
Rating
Units
Min
Max
Storage Temperature
Tstg
55
+125
°C
Ambient Temperature with Power Applied
TA
40
+85
°C
Voltage with Respect to Ground All Pins except
A9, OE, RESET *1, *2
VIN, VOUT
0.5
VCC+0.5
V
Power Supply Voltage *1
VCC
0.5
+4.0
V
A9, OE, and RESET *1, *3
VIN
0.5
+13.0
V
WP/ACC *1, *4
VACC
0.5
+10.5
V



Description

The MBM29DL32XTE/BE80 are a 32 M-bit, 3.0 V-only Flash memory organized as 4 Mbytes of 8 bits each or 2 Mwords of 16 bits each. These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.

MBM29DL32XTE/BE80 are organized into two banks, Bank 1 and Bank 2, which are considered to be two separate memory arrays for operations. It is the Fujitsu's standard 3 V only Flash memories, with the additional capability of allowing a normal non-delayed read access from a non-busy bank of the array while an embedded write (either a program or an erase) operation is simultaneously taking place on the other bank.




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