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MB86616

Features: • IEEE 1394 Controller Unit• Compliant with the IEEE Standard for High Performance Serial Bus (IEEE Std. 1394-1995• Physical and link layer modules integrated on a single chip• Two cable ports• Data transfer rates supported : S100, S200, S400• Data buf...

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SeekIC No. : 004413604 Detail

MB86616: Features: • IEEE 1394 Controller Unit• Compliant with the IEEE Standard for High Performance Serial Bus (IEEE Std. 1394-1995• Physical and link layer modules integrated on a single...

MB86616 Data Sheet

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Part Number:
MB86616
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• IEEE 1394 Controller Unit
• Compliant with the IEEE Standard for High Performance Serial Bus (IEEE Std. 1394-1995
• Physical and link layer modules integrated on a single chip
• Two cable ports
• Data transfer rates supported : S100, S200, S400
• Data buffer dedicated to asynchronous transmission/reception
• 2-Kbyte (1/2/4 bank-switchable) , transmission/reception shared data buffer
• 128-byte buffer dedicated to asynchronous transmission and 128-byte buffer dedicated to asynchronous reception
• Automatic separation of the packet header and data upon reception and automatic packetization of information
  upon transmission
• 32-bit CRC generation and check functions
• Chain transfer function for data transfer sequence
• 4- and 4-conductor cables supported
• SCSI Protocol Controller Unit
• Dedicated to initiator operation
• FAST-20 data transfer (8-bit)
  Synchronous transfer : 20 MBps Max. (Maximum offset value of 15)
  Asynchronous transfer : 5 MBps Max.
• Internal 16-byte FIFO data register
• Totem pole type of Fast20 single-end driver/receiver
• 28-bit transfer byte counter enabling simultaneous transfer of up to 256 Mbytes of data
• F2MC-16F Unit
• Minimum instruction execution time : 40.7 ns (at 24.576 MHz)
• Instruction set optimized for controller applications
• Instruction set supporting high-level languages (including C) and multi tasking
• Miscellaneous
• Supply voltage : 3.3 V and 5 V power supplies
• Package : LQFP-144 (FPT-144P-M08)


Pinout

Connection Diagram


Specifications

Parameter Symbol Value Unit
Min. Max.
Power supply voltage VDD VSS 0.5 4.0 V
VDD 6.0
Input voltage VI VSS 0.5 VDD + 0.5 V
VI
Output voltage VO VSS 0.5 VDD + 0.5 V
VO
Storage temperature TST -55 +125 °C
Operating temperature Top -40 +125 °C
Output current*3 LO IOL = 4 mA +14 mA
Overshoot*4 -- -- VDD + 1.0 V
Undershoot*4 -- -- VSS 1.0 V
*1 : For SCSI I/O
*2 : Maximum supply current which can flow in steady state. Exceeding it is allowed only within 1 second per LSI unit excluding the SCSI I/O.
*3 : Within 50 ns
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
   temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.


Description

The MB86616 is the LSI for protocol conversion to connect SCSI devices to the IEEE 1394 bus. This LSI integrates a 1394 controller compliant with the IEEE Standard for High Performance Serial Bus (IEEE Std. 1394-1995, or FireWire standard) and an SCSI protocol controller compliant with the SCSI-Fast20 standard on a single chip. It also incorporates the F2MC-16F as a processor for controlling the individual on-chip controllers, providing ease of control.

The IEEE 1394 controller unit has two ports for use in a cable environment and contains a differential transceiver and a comparator. It supports S400 data transfer rates. In addition, MB86616 supports the Chain command to continuously issue request packets for data transmission and reception, improving the efficiency of data transfer.

The SCSI protocol controller unit of MB86616 conforms to 8-bit Fast20 SCSI, enabling data transfer at a maximum of 20 Mbyte/s. For the SCSI bus terminal, the unit contains a totem pole type of single-end driver/receiver so that it can drive the SCSI bus directly.

While inheriting the AT architecture of the MB86616, the instruction set for the F2MC-16F CPU core incorporates additional instructions for high-level languages, supports extended addressing modes, and contains enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation instructions.




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