M74HCT164

Features: .HIGHSPEED tPD =20 ns(TYP.) ATVCC =5V.LOWPOWER DISSIPATION ICC =4 A(MAX.)AT TA =25°C.OUTPUTDRIVE CAPABILITY 10 LSTTLLOADS.BALANCEDPROPAGATIONDELAYS tPLH =tPHL =4mA (MIN.).SYMMETRICALOUTPUTIMPEDANCE IOL =?IOH? =4 mA(MIN).COMPATIBLE WITHTTLOUTPUTS VIH = 2V(MIN.)VIL = 0.8V (MAX).WIDE OPERAT...

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SeekIC No. : 004407240 Detail

M74HCT164: Features: .HIGHSPEED tPD =20 ns(TYP.) ATVCC =5V.LOWPOWER DISSIPATION ICC =4 A(MAX.)AT TA =25°C.OUTPUTDRIVE CAPABILITY 10 LSTTLLOADS.BALANCEDPROPAGATIONDELAYS tPLH =tPHL =4mA (MIN.).SYMMETRICALOUTPUT...

floor Price/Ceiling Price

Part Number:
M74HCT164
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

.HIGHSPEED tPD =20 ns(TYP.) ATVCC =5V
.LOWPOWER DISSIPATION ICC =4 A(MAX.)AT TA =25°C
.OUTPUTDRIVE CAPABILITY 10 LSTTLLOADS
.BALANCEDPROPAGATIONDELAYS tPLH =tPHL =4mA (MIN.)
.SYMMETRICALOUTPUTIMPEDANCE IOL =?IOH? =4 mA(MIN)
.COMPATIBLE WITHTTLOUTPUTS VIH = 2V(MIN.)VIL = 0.8V (MAX)
.WIDE OPERATINGVOLTAGERANGE VCC (OPR)= 2V TO6 V PIN ANDFUNCTION COMPATIBLE
. WITH 54/74LS164



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Source Sink Current Per Output Pin ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500 (*) mW
Tstg Storage Temperature -65 to +150 OC
TL Lead Temperature (10 sec) 300 OC



Description

The M54/74HCT164 is a high speed CMOS 8 BIT SIPO SHIFT REGISTER fabricated in silicon gate 2 C MOStechnology.Ithasthesamehighspeedperformance ofLSTTLcombined with trueCMOSlow powerconsumption.

TheHCT164isan8bitshiftregister withserialdata entry and an outputfrom each of the eightstages. Dataisentered seriallythrough oneoftwoinputs (A orB),either oftheseinputscanbeusedasanactive high enable for data entry through the other input.

An unusedinput must be high,or bothinputscon- nectedtogether. Each low-to-hightransition on the clock input shifts data one place to the right and entersintoQA,thelogicNANDofthetwodatainputs (A* B),the datathatexisted before therising clock edge. A low level on the clear input overrides all otherinputsand clearstheregisterasynchronously, forcing allQ outputslow.

All inputs are equipped with protection circuits against static discharge and transient excess volt- age.

Thisintegrated circuit of M54/74HCT164  hasinputand outputcharac- teristicsthat arefully compatible with 54/74LSTTL logicfamilies. M54/74HCT devices aredesigned to 2 directly interface HSC MOSsystemswith TTLand NMOScomponents. They arealso plugin replacements for LSTTL devices giving a reduction of powerconsumption.


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