M74HCT138

Features: `HIGH SPEED: tPD = 16 ns (TYP.) at VCC = 4.5V`LOW POWER DISSIPATION: ICC = 1mA(MAX.) at TA=25°C`COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX)`SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)`BALANCED PROPAGATION DELAYS: tPLH tPHL`PIN AND FUNCTION COMPATIBLE WITH 74...

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M74HCT138 Picture
SeekIC No. : 004407231 Detail

M74HCT138: Features: `HIGH SPEED: tPD = 16 ns (TYP.) at VCC = 4.5V`LOW POWER DISSIPATION: ICC = 1mA(MAX.) at TA=25°C`COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX)`SYMMETRICAL OUTPUT IMPEDANCE:...

floor Price/Ceiling Price

Part Number:
M74HCT138
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

`HIGH SPEED:
  tPD = 16 ns (TYP.) at VCC = 4.5V
`LOW POWER DISSIPATION:
  ICC = 1mA(MAX.) at TA=25°C
`COMPATIBLE WITH TTL OUTPUTS :
  VIH = 2V (MIN.) VIL = 0.8V (MAX)
`SYMMETRICAL OUTPUT IMPEDANCE:
  |IOH| = IOL = 4mA (MIN)
`BALANCED PROPAGATION DELAYS:
  tPLH tPHL
`PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500(*) mW
Tstg Storage Temperature -65 to +150 °C
TL Lead Temperature (10 sec) 300 °C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C




Description

The M74HCT138 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate C2MOS technology. If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go low.

If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems.

All inputs of M74HCT138 are equipped with protection circuits against static discharge and transient excess voltage.




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