M74HC76

. HIGH SPEED :                                
  f  = 67MHz (TYP.) at V  = 6VMAX CC
. LOW POWER DISSIPATION:
  I  =2 A(MAX.) at T =25°CCC A
. HIGH NOISE IMMUNITY:
  V  = V  = 28 % V  (MIN.)NIH NIL CC
. SYMMETRICAL OUTPUT IMPEDANCE:
  |I | = I  = 4mA (MIN)OH OL
. BALANCED PROPAGATION DELAYS:
  tPLH   t PHL  
. WIDE OPERATING VOLTAGE RANGE:
  VCC (OPR) = 2V to 6V
. PIN AND FUNCTION COMPATIBLE WITH  74 SERIES 76

The M74HC76 is an high speed CMOS DUAL J-KFLIP FLOP WITH CLEAR fabricated with silicon gate  C² MOS technology.


Depending on with the logic level at J and K inputs, this device changes state on the negative going transition of clock pulse (CK) . CLEAR (CLR)and PRESET (PR) are independent of the clock
and are accomplished by a logic low on the corresponding input.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.