Features: *HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V*LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C*HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)*SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)*BALANCED PROPAGATION DELAYS: tPLH tPHL *WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V...
M74HC4514: Features: *HIGH SPEED: tPD= 20 ns (TYP.) at VCC = 6V*LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C*HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)*SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = ...
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Symbol | Parameter | Value | Unit |
VCC | Supply Voltage | -0.5 to +7 | V |
VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
IIK | DC Input Diode Current | ± 20 | mA |
IOK | DC Output Diode Current | ± 20 | mA |
IO | DC Output Current | ± 25 | mA |
ICC or IGND | DC VCC or Ground Current | ± 50 | mA |
PD | Power Dissipation | 500(*) | mW |
Tstg | Storage Temperature | -65 to +150 | |
TL | Lead Temperature (10 sec) | 300 |
The M74HC4514 is an high speed CMOS 4 LINE TO 16 LINE SEGMENT DECODER WITH LATCHED INPUTS fabricated with silicon gate C2MOS technology.
A binary code stored in the four input latches (A to D) provides a high level at the selected one of sixteen outputs excluding the other fifteen outputs,
when the inhibit input ( INHIBIT ) is held low. When the inhibit input ( INHIBIT ) is held high, all outputs of M74HC4514 are kept low level, while the latch function is available. The data applied to the data inputs are transferred to the Q outputs of latches when the strobe input is held high. When the strobe input is taken low, the information data applied to the data input at a time is retained at the output of the latches.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.