M74HC352

Features: `HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V `LOWPOWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C `OUTPUT DRIVE CAPABILITY10 LSTTL LOADS `SYMMETRICAL OUTPUT IMPEDANCE IOL = |IOH |= 4 mA (MIN.)`HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)`WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V T...

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M74HC352 Picture
SeekIC No. : 004407130 Detail

M74HC352: Features: `HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V `LOWPOWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C `OUTPUT DRIVE CAPABILITY10 LSTTL LOADS `SYMMETRICAL OUTPUT IMPEDANCE IOL = |IOH |= 4 mA (MI...

floor Price/Ceiling Price

Part Number:
M74HC352
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

`HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V
`LOWPOWER DISSIPATION ICC = 4 A (MAX.) AT TA = 25 °C
`OUTPUT DRIVE CAPABILITY   10 LSTTL LOADS
`SYMMETRICAL OUTPUT IMPEDANCE IOL = |IOH |= 4 mA (MIN.)
`HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)
`WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V
` PIN AND FUNCTION COMPATIBLE WITH 54/74LS646/648



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC
Supply Voltage
-0.5 to +7
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Source Sink Current Per Output Pin
± 35
mA
ICC or IGND
DC VCC or Ground Current
± 70
mA
PD
Power Dissipation
500 (*)
mW
Tstg
Storage Temperature
-65 to +150
°C
TL
Lead Temperature (10 sec)
300
°C
AbsoluteMaximumRatings are those values beyond whichdamage tothe device may occur. Functional operation under these condition isnotimplied.(*) 500 mW:  65 °C derate to 300mWby 10mW/°C: 65 °C to85°C


Description

The M54/74HC352 and M54/74HC353 are high speedCMOS DUAL 4CHANNEL MULTIPLEXERS INVERTING fabricated with silicon gate C2MOS technology.

M54/74HC352 and M54/74HC353 achieve high speed operation, similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The designer has a choice of complementary output (HC352) and 3 state output (HC353). Each of these data (1C0-1C3, 2C0-2C3) is selected by the two address inputs A and B.

Separate strobe inputs (1G, 2G) are provided for each of the two four line sections. Taking the strobe input (1G,2G) high inhibits the outputs. The output of HC352 is fixed at logic low level and the output of HC353 has a high impedance, unconditionally.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.




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