M74HC165

PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ...

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M74HC165 Picture
SeekIC No. : 004407084 Detail

M74HC165: PinoutSpecifications Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK ...

floor Price/Ceiling Price

Part Number:
M74HC165
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500(*) mW
Tstg Storage Temperature -65 to +150
TL Lead Temperature (10 sec) 300

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 ; derate to 300mW by 10mW/from 65°C to 85


Description

The M74HC165 is an high speed CMOS 8 BIT PISO SHIFT REGISTER fabricated with silicon gate C2MOS technology.

This M74HC165 contains eight clocked master slave RS flip-flops connected as a shift register, with auxiliary gating to provide over-riding asynchronous parallel entry. Parallel data enters when the shift/load input is low. The parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. For clocked operation, shift/load must be high. The two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate.

To avoid double clocking, however, the inhibit signal should only go high while the clock is high. Otherwise the rising inhibit signal will cause the same response as rising clock edge.

All inputs of M74HC165 are equipped with protection circuits against static discharge and transient excess voltage.




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