M74HC107

Features: .HIGH SPEEDfMAX = 75 MHz (TYP.) AT VCC = 5 V .LOWPOWER DISSIPATIONICC = 2 mA (MAX.) AT TA = 25°C .HIGH NOISE IMMUNITYVNIH= VNIL= 28%VCC (MIN.) .OUTPUT DRIVE CAPABILITY10 LSTTL LOADS .SYMMETRICAL OUTPUT IMPEDANCEIOH = IOL = 4 mA (MIN.) .BALANCEDPROPAGATION DELAYStPLH = tPHL .WIDE OPERATIN...

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M74HC107 Picture
SeekIC No. : 004407057 Detail

M74HC107: Features: .HIGH SPEEDfMAX = 75 MHz (TYP.) AT VCC = 5 V .LOWPOWER DISSIPATIONICC = 2 mA (MAX.) AT TA = 25°C .HIGH NOISE IMMUNITYVNIH= VNIL= 28%VCC (MIN.) .OUTPUT DRIVE CAPABILITY10 LSTTL LOADS .SYMME...

floor Price/Ceiling Price

Part Number:
M74HC107
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

.HIGH SPEED
fMAX = 75 MHz (TYP.) AT VCC = 5 V
.LOWPOWER DISSIPATION
ICC = 2 mA (MAX.) AT TA = 25°C
.HIGH NOISE IMMUNITY
VNIH= VNIL= 28%VCC (MIN.)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
tPLH = tPHL
.WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
.PIN AND FUNCTION COMPATIBLE WITH 54/74LS107



Pinout

  Connection Diagram


Specifications

Symbol Parameter Value Unit
VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VDD + 0.5 V
VO DC Output Voltage -0.5 to VDD + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Source Sink Current Per Output Pin ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500 (*) mW
Tstg Storage Temperature -65 to +150 oC



Description

   The M54/74HC107 is a high speed CMOSDUAL JK FLIPFLOP fabricated in silicon gateC2MOStechnology.M54/74HC107 has the same high speed performance of LSTTL combined with true CMOS low power consumption.These flip-flop are edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, CLOCK, and CLEAR input and Qand Q outputs. CLEAR is independent of the clock and accomplished by a logic low on the input. All inputs are equipped with protection circuits against static discharge and transient excess voltage.




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