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M5M29KE131BVP

Features: ·Access time Random 70ns (Max.)·Page 25ns(Max.)·Supply voltage VCC= 3.0 ~ 3.6V·Ambient temperature Ta=-40 ~ 85 °C·Package 48pin TSOP(Type-I), Lead pitch 0.5mm·Outer-lead finishing : Sn-CuApplication·Digital Cellar Phone, Telecommunication,·PDA, Car Navigation System, Video Game MachinePi...

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SeekIC No. : 004406180 Detail

M5M29KE131BVP: Features: ·Access time Random 70ns (Max.)·Page 25ns(Max.)·Supply voltage VCC= 3.0 ~ 3.6V·Ambient temperature Ta=-40 ~ 85 °C·Package 48pin TSOP(Type-I), Lead pitch 0.5mm·Outer-lead finishing : Sn-CuA...

M5M29KE131BVP Data Sheet

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Part Number:
M5M29KE131BVP
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

·Access time Random 70ns (Max.)
·Page 25ns(Max.)
·Supply voltage VCC= 3.0 ~ 3.6V
·Ambient temperature Ta=-40 ~ 85 °C
·Package 48pin TSOP(Type-I), Lead pitch 0.5mm
·Outer-lead finishing : Sn-Cu


Application

·Digital Cellar Phone, Telecommunication,
·PDA, Car Navigation System, Video Game Machine


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Conditions
Min.
Max.
Units
VCC
VCC Voltage
With Respect to GND
-0.2
4.6
V
VI1
All Input or Output Voltage 1)
-0.6
4.6
V
Ta
Ambient Temperature
-40
85
°C
Tbs
Temperature under Bias
-50
95
°C
Tstg
Storage Temperature
-65
125
°C
Iout
Output Short Circuit Current
100
mA

1)Minimum DC voltage is 0.6V on input / output pins. During transitions, the level may undershoot to 2.0V for periods <20ns. Maximum DC voltage on input / output pins is VCC+0.5V which, during transitions, may overshoot to VCC+1.5V for periods <20ns.




Description

The M5M29KE131BVP is a Stacked micro Multi Chip Package that contents 2 Dies of 64M-bit Flash memory in a 48-pin TSOP(I) for lead free use.

128M-bit Flash memory is a 16,777,216 bytes / 8,388,608 words, single power supply and high performance nonvolatile memory fabricated by CMOS technology for the peripheral circuit and DINOR IV (Divided bit-line NOR IV) architecture for the memory cell. All memory blocks are locked and can not be programmed or erased, when WP# is Low. Using Software Lock Release function, program or erase operation can be executed.

The M5M29KE131BVP is suitable for a high performance cellular phone and a mobile PC that are required to be small mounting area, weight and small power dissipation.




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