M59PW1282

Stressing the device above the rating listed in the Absolute Maximum Ratings" table may cause permanent damage to the device. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

The M59PW1282 is a 128Mbit (8Mb x16), Mask-ROM pinout compatible, non-volatile LightFlash™ memory, that can be read, erased and reprogrammed.Read operations can be performed using a single low voltage (2.7 to 3.6V) supply.
Program and Erase operations require an additional VPP (11.4 to 12.6V) power supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM.

The Mask-ROM compatibility is obtained using a dual function Address/Voltage Supply pin (A22/VPP). In Read mode the A22/VPP pin works as an address pin; in Program or Erase mode it also works as a voltage supply pin. At the beginning of any program or erase operation, a specific procedure (see Figure 4) must be performed to internally
memorize the A22 value that will be used during the program or erase operation.

The M59PW1282 device is composed of two 64Mbit memories stacked in a single package. Recommended operating conditions do not allow both memories to be active at the same time. Address A22 selects the memory to be enabled. The other memory is in Standby mode.

The M59PW1282 memory is divided into 64 uniform blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller (P/E.C.) simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents.

The M59PW1282 features an innovative command,Multiple Word Program, that is used to program large streams of data. It greatly reduces the total programming time when a large number of Words are written to the memory at any one time.Using this command the entire memory can be programmed in 16s, compared to 72s using the standard Word Program.

The end of a Program or Erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. Chip Enable and Output Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional
logic.
The memory is offered in SO44 package and is
supplied with all the bits set to '1').