M29W160ET

Features:

`SUPPLY VOLTAGE
           V<sub>CC</sub> = 2.7V to 3.6V for Program, Erase and Read
`ACCESS TIMES: 70, 90ns
`PROGRAMMING TIME
           10µs per Byte/Word typical
`35 MEMORY BLOCKS
           1 Boot Block (Top or Bottom Location)
           2 Parameter and 32 Main Blocks
`PROGRAM/ERASE CONTROLLER
           Embedded Byte/Word Program algorithms
`ERASE SUSPEND and RESUME MODES
           Read and Program another Block during Erase Suspend
`UNLOCK BYPASS PROGRAM COMMAND
           Faster Production/Batch Programming
`TEMPORARY BLOCK UNPROTECTION MODE
`COMMON FLASH INTERFACE
           64 bit Security Code
`LOW POWER CONSUMPTION
           Standby and Automatic Standby
`100,000 PROGRAM/ERASE CYCLES per BLOCK
`ELECTRONIC SIGNATURE
           Manufacturer Code: 0020h
           Top Device Code M29W160ET: 22C4h
           Bottom Device Code M29W160EB: 2249h


Pinout




Specifications

Symbol	Parameter	Min	Max	Unit
TBIAS	Temperature Under Bias	50	125
TSTG	Storage Temperature	65	150
VIO	Input or Output Voltage (1,2)	0.6	VCC +0.6	V
VCC	Supply Voltage	0.6	4	V
VID	Identification Voltage	0.6	13.5	V

Description

The M29W160ET is a 16 Mbit (2Mb x8 or 1Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM.

The memory M29W160ET is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents.

The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

The blocks in the memory are asymmetrically arranged, see Figures 5 and 6, Block Addresses.

The first or last 64 KBytes M29W160ET have been divided into four additional blocks. The 16 KByte Boot Block can be used for small initialization code to start the microprocessor, the two 8 KByte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored.

Chip Enable, Output Enable and Write Enable signals M29W160ET control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic.

The memory M29W160ET is offered TSOP48 (12 x 20mm) and TFBGA48 (0.8mm pitch) packages. The memory is supplied with all the bits erased (set to '1').