M29DW128G

The M29DW128G is a 128 Mbit (8 Mb x 16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6 V) supply. At Power-up the memory defaults to its Read mode.

The M29DW128G features an asymmetrical block architecture, with 8 parameter and 62 main blocks, divided into four banks, A, B, C and D, providing multiple bank operations.

While programming or erasing in one bank, read operations are possible in any other bank.

The bank architecture is summarized in Table 2. Four of the parameter blocks are at the top
of the memory address space, and four are at the bottom.

Program and Erase commands M29DW128G are written to the command interface of the memory. An onchip Program/Erase controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

The Chip Enable, Output Enable and Write Enable signals control the bus operations of the memory. They allow simple connection to most microprocessors, often without additional logic.

The M29DW128G supports Asynchronous Random Read and Page Read from all blocks of the memory array.

The M29DW128G has one extra 256 words block (extended block, 128 words factory locked and 128 words customer lockable) that can be accessed using a dedicated command. The extended block can be protected and so is useful for storing security information. However the protection is irreversible, once protected the protection cannot be undone.

Each block M29DW128G can be erased independently, so it is possible to preserve valid data while old data is erased.