Features: · Integrated SAW delay line; Output of 15 to 700 MHz *· Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)· LVPECL clock output (CML and LVDS options available)· Pin-selectable PLL divider ratios support FEC ratios • M2080/85: OTU1 (255/238) and OTU2 (2...
M2086: Features: · Integrated SAW delay line; Output of 15 to 700 MHz *· Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)· LVPECL clock output (CML and LVDS options available)...
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Symbol |
Parameter |
Rating |
Unit |
VI | Inputs |
-0.5 to VCC +0.5 |
V |
VO | Outputs |
-0.5 to VCC +0.5 |
V |
VCC | Power Supply Voltage |
4.6 |
V |
TS | Storage Temperature |
-45 to +100 |
The M2086 are VCSO (Voltage Controlled SAW Oscillator) based clock PLLs designed for FEC clock ratio translation in 10Gb optical systems such as OC-192 or 10GbE. They support FEC (Forward Error Correction) clock multiplication ratios, both forward (mapping) and inverse (de-mapping). Multiplication ratios are pin-selected from pre-programming look-up tables.