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M2081

Features: · Integrated SAW delay line; Output of 15 to 700 MHz *· Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)· LVPECL clock output (CML and LVDS options available)· Pin-selectable PLL divider ratios support FEC ratios • M2080/85: OTU1 (255/238) and OTU2 (2...

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SeekIC No. : 004404098 Detail

M2081: Features: · Integrated SAW delay line; Output of 15 to 700 MHz *· Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)· LVPECL clock output (CML and LVDS options available)...

M2081 Data Sheet

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Part Number:
M2081
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Integrated SAW delay line; Output of 15 to 700 MHz *
· Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)
· LVPECL clock output (CML and LVDS options available)
· Pin-selectable PLL divider ratios support FEC ratios
      • M2080/85: OTU1 (255/238) and OTU2 (255/237) Mapping
      • M2081/86: OTU1 (238/255) or OTU2 (237/255) De-mapping
      • M2082/87: OTU1 (238/255) and OTU2 (237/255) De-mapping
· Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOS, LVTTL
· Loss of Lock (LOL) output pin; Narrow Bandwidth control input (NBW pin)
· AutoSwitch (AUTO pin) - automatic (non-revertive) reference clock reselection upon clock failure
· Acknowledge pin (REF_ACK pin) indicates the actively selected reference input
· Options for Hitless Switching (HS) with or without Phase Build-out (PBO) to enable SONET (GR-253) /SDH (G.813) MTIE and TDEV compliance during reselection
· Single 3.3V power supply
· Small 9 x 9 mm SMT (surface mount) package


Pinout

Connection Diagram


Specifications


Symbol
Parameter
Rating
Unit
VI Inputs
-0.5 to VCC +0.5
V
VO Outputs
-0.5 to VCC +0.5
V
VCC Power Supply Voltage
4.6
V
TS Storage Temperature
-45 to +100

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.


Description

The M2081 are VCSO (Voltage Controlled SAW Oscillator) based clock PLLs designed for FEC clock ratio translation in 10Gb optical systems such as OC-192 or 10GbE. They support FEC (Forward Error Correction) clock multiplication ratios, both forward (mapping) and inverse (de-mapping). Multiplication ratios are pin-selected from pre-programming look-up tables.




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