LM4310

PinoutSpecificationsFunctionReceiverBits18 or 24Max PCLK Frequency30 MHzVDDP1.6V to 2.0VVDDI/O1.6V to 2.0VTarget ApplicationMobile PhoneRecommended InterfaceRGBSelectable Edge RateYesPowerWise TechnologyMobile Pixel Link BridgeExternal Filters Req'dNoI/O LevelsMPL-2Special FeaturesAuto Power Down ...

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LM4310 Picture
SeekIC No. : 004395699 Detail

LM4310: PinoutSpecificationsFunctionReceiverBits18 or 24Max PCLK Frequency30 MHzVDDP1.6V to 2.0VVDDI/O1.6V to 2.0VTarget ApplicationMobile PhoneRecommended InterfaceRGBSelectable Edge RateYesPowerWise Techn...

floor Price/Ceiling Price

Part Number:
LM4310
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Pinout




Specifications

FunctionReceiver
Bits18 or 24
Max PCLK Frequency30 MHz
VDDP1.6V to 2.0V
VDDI/O1.6V to 2.0V
Target ApplicationMobile Phone
Recommended InterfaceRGB
Selectable Edge RateYes
PowerWise TechnologyMobile Pixel Link Bridge
External Filters Req'dNo
I/O LevelsMPL-2
Special FeaturesAuto Power Down on Stop Clock , SPI Interface
ESD2 kV
View Using Catalog



Description

The LM4310 deserializes a Two Data + Clock Mobile Pixel Link (MPL-2) RGB serial link. Two operating modes are supported: 24-bit RGB and also 18-bit RGB.

The video interconnect is reduced from 28 signals to 3 differential signals with the LM4312 SER and companion LM4310 DES device, easing flex interconnect design, size constraints and cost.

Bufferless displays from QVGA (320 x 240) up to >VGA (640 x 480) pixels are supported.

The Deserializer also provides a glitch filter on the three control signals (DE, VS and HS). Glitches of 1 or 2 PCLKs wide are filtered out by the Deserializer to prevent flicker on the display.

Performance of the serial link can be checked by use of the parity/packet error reporting pin that monitors the serial payload odd parity bit and reports errors.

The LM4310 DES and LM4312 SER implements the physical layer of the MPL-2 Interface and features robust common-mode noise rejection.




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