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LC35W1000BM

Features: • Low-voltage operation: 2.7 to 3.6 V• Wide operating temperature range: 40 to +85°C• Access time:70 ns (maximum):LC35W1000BM and LC35W1000BTS-70U.100 ns (maximum):LC35W1000BM and LC35W1000BTS-10U.• Low current drainStandby mode: 0.1 A (typical*) at Ta = +25°C10.0...

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SeekIC No. : 004391607 Detail

LC35W1000BM: Features: • Low-voltage operation: 2.7 to 3.6 V• Wide operating temperature range: 40 to +85°C• Access time:70 ns (maximum):LC35W1000BM and LC35W1000BTS-70U.100 ns (maximum):LC35W1...

LC35W1000BM Data Sheet

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Part Number:
LC35W1000BM
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Low-voltage operation: 2.7 to 3.6 V
• Wide operating temperature range: 40 to +85°C
• Access time:
70 ns (maximum):
LC35W1000BM and LC35W1000BTS-70U.
100 ns (maximum):
LC35W1000BM and LC35W1000BTS-10U.
• Low current drain
Standby mode: 0.1 A (typical*) at Ta = +25°C
10.0 A (maximum) at Ta = 40 to +70°C
20.0 A (maximum) at Ta = 40 to +85°C
• Data retention voltage: 2.0 to 3.6 V
• No clock required (fully static circuits)
• Input/output shared function pins, 3-state output pins
• Package
32-pin SOP (525 mil) plastic package:
LC35W1000BM
32-pin TSOP (8 * 14 mm) plastic package (Normal):
LC35W1000BTS


Pinout

Connection Diagram


Specifications

Characteristic
 Conditions
Symbol
Ratings
Unit
Maximum supply voltage  
VCCmax
4.6
V
Input pin voltage  
VIN
0.3* to VCC + 0.3
V
I/O pin voltage  
VI/O
0.3 to VCC + 0.3
V
Operating Temperature range  
TOPR
40 to +85
°C
Storage temperature range  
TSTG
55 to +125
°C

*: For pulse widths under 30 ns: 2.0 V
Note: This chip may be destroyed if any stress in excess of the absolute maximum ratings is applied.



Parameter
Symbol
Value
Unit
Remark
Input voltage
Vin
35
V
-
Disable voltage
Vdis
35
V
-



Description

The LC35W1000BM and LC35W1000BTS-70U/10U are asynchronous silicon gate CMOS static RAM devices with a 131,072-word by 8-bit structure. They provide two chip enable pins (CE1 and CE2) for device select/deselect control and one output enable pin (OE) for output control. They feature high speed, low power, and a wide operating temperature range.This makes them optimal for use in systems that require high speed, low power, and battery backup. They also support easy memory expansion.




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