LC35256D

• Supply voltage range: 2.7 to 5.5 V
- 5-V operation: 5.0 V±10%
- 3-V operation: 2.7 to 3.6 V
• Access times
- 5-V operation
LC35256DM, DT-70: 70 ns (max)
LC35256D, DM, DT-10: 100 ns (max)
- 3-V operation
LC35256DM, DT-70: 200 ns (max)
LC35256D, DM, DT-10: 500 ns (max)
• Standby current
- 5-V operation: 1.0 A (Ta  60°C),
5.0 A (Ta  85°C)
- 3-V operation: 0.8 A (Ta  60°C),
4.0 A (Ta  85°C)
• Operating temperature range: 40 to +85°C
• Data retention supply voltage: 2.0 to 5.5 V
• All I/O levels
- 5-V operation: TTL compatible
- 3-V operation: VCC 0.2 V/0.2 V
• Shared I/O pins and 3-state outputs
• No clock signal required.
• Packages
- 28-pin DIP (600 mil) plastic package: LC35256D
- 28-pin SOP (450 mil) plastic package: LC35256DM
- 28-pin TSOP (8 ´ 13.4 mm) plastic package: LC35256DT

The LC35256D, LC35256DM, and LC35256DT are 32768-word × 8-bit asynchronous silicon gate CMOS static RAMs. These devices use a 6-transistor full CMOS memory cell, and feature low-voltage operation, low current drain, and an ultralow standby current. They provide two control signal inputs: an OE input for highspeed access and a chip select (CE) input for device selection and low power operating mode. This makes these devices optimal for systems that require low power or battery backup, and they allow memory to be expanded easily. Their ultralow standby current allows capacitorbased backup to be used as well. Since they support 3-V operation, they are appropriate for use in portable systems that operate from batteries.