KHC21025

Features:

·High-speed switching
·No secondary breakdown
·Very low on-resistance.




Pinout






Specifications

Parameter	Symbol	N-Channel	P-Channel	Unit
Drain to Source Voltage	VDSS	30	-30	V
Gate to Source Voltage	VGS	±20	±20	V
Drain Current Ts 80	ID	3.5	-2.3	A
peak drain current *1 total power dissipation Ts = 80 ; *2 Tamb= 25 ; * 3 Tamb = 25 ; * 4 Tamb = 25 ; * 5	Ptot	2		W
		2
		1
		1.3
storage temperature	Tstg	-65 to 150
operating junction temperature	Tj	150
source current (DC) Ts 80	IS	1.5	1.25	A
peak pulsed source current *1	ISM	6	-5	A
thermal resistance from junction to soldering point	Rth j-s	35		K/W

*1 Pulse width and duty cycle limited by maximum junction temperature.
*2 Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
*3 Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-
t (ambient to tie-point) of 27.5 K/W.
*4 Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-
tp (ambient to tie-point) of 90 K/W.
*5 Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit
board with an Rth a-tp (ambient to tie-point) of 90 K/W.