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KFM1G16Q2M

Features: `Device Architecture• Design Technology:..............90nm• Supply Voltage:................1.8V (1.7V ~ 1.95V)• Host Interface:................ 16 bit• 5KB Internal BufferRAM:............1KB BootRAM, 4KB DataRAM• SLC NAND Array:................(2K+64)B Page ...

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SeekIC No. : 004385252 Detail

KFM1G16Q2M: Features: `Device Architecture• Design Technology:..............90nm• Supply Voltage:................1.8V (1.7V ~ 1.95V)• Host Interface:................ 16 bit• 5KB Internal...

KFM1G16Q2M Data Sheet

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Part Number:
KFM1G16Q2M
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

`Device Architecture
• Design Technology:..............90nm
• Supply Voltage:................1.8V (1.7V ~ 1.95V)
• Host Interface:................ 16 bit
• 5KB Internal BufferRAM:............1KB BootRAM, 4KB DataRAM
• SLC NAND Array:................(2K+64)B Page Size, (128K+4K)B Block Size
`Device Performance
• Host Interface Type:..............Synchronous Burst Read
............................- Up to 54MHz clock frequency
............................- Linear Burst 4-, 8-, 16, 32-words with wrap around
............................- Continuous 1K word Sequential Burst
..........................Asynchronous Random Read
-............................-  76ns access time
..........................Asynchronous Random Write
• Programmable Burst Read Latency.......Latency 3(up to 40MHz), 4, 5, 6, and 7
• Multiple Sector Read:..............Up to 4 sectors using Sector Count Register
• Multiple Reset Modes:..............Cold/Warm/Hot/NAND Flash Resets
• Multi Block Erase ................up to 64 Blocks
• Low Power Dissipation:.............Typical Power,
.............................- Synchronous Burst Read current(54MHz) : 12mA
.............................- Load current : 30mA
.............................- Program current : 25mA
.............................- Erase current : 20mA
.............................- Multi Block Erase current : 20mA
• Reliable CMOS Floating-Gate Technology - Endurance : .100K Program/Erase Cycles
...............................- Data Retention : 10 Years
`System Hardware
• Voltage detector generating internal reset signal from Vcc
• Hardware reset input (/RP)..............- Write Protection for BootRAM
• Data Protection Modes................- Write Protection for NAND Flash Array
.............................- - Write Protection during power-up
.............................- - Write Protection during power-down
• User-controlled One Time Programmable(OTP) area
• Internal 2bit EDC / 1bit ECC
• Internal Bootloader supports Booting Solution in system
• Handshaking Feature.................- INT pin indicates Ready / Busy
.............................- Polling the interrupt register status bit
• Detailed chip information...............- by ID registe
`Packaging
• 1G products......................63ball, 10mm x 13mm x max 1.0mmt , 0.8mm ball pitch FBGA
• 2G DDP products...................63ball, 11mm x 13mm x max 1.2mmt , 0.8mm ball pitch FBGA (TBD)





Specifications

 

Parameter
Symbol
Rating
Unit
Voltage on any pin relative to VSS Vcc
Vcc
-0.5 to + 2.45
V
All Pins
VIN
-0.5 to + 2.45
Temperature Under Bias Extended
Tbias
-30 to +125
Industrial

-40 to +125

Storage Temperature
Tstg
-65 to +150
Short Circuit Output Current
IOS
5
mA
Recommended Operating Temperature
TA Extended Temp.)
-30 to + 85
TA (Industrial Temp.)

-40 to + 85

 




Description

The KFM1G16Q2M is an advanced generation, high-performance NAND-based Flash memory.

KFM1G16Q2M integrates on-chip a single-level-cell (SLC) NAND Flash Array memory with two independent data buffers, boot RAM buffer, a page buffer for the Flash array, and a one-time-programmable block.

The combination of these memory areas enable high-speed pipelining of reads from host, BufferRAM, Page Buffer, and NAND Flash Array.

Clock speeds up to 54MHz with a x16 wide I/O yields a 68MByte/second bandwidth.

The KFM1G16Q2M also includes a Boot RAM and boot loader. This enables the device to efficiently load boot code at device startup from the NAND Array without the need for off-chip boot device.

One block of the NAND Array KFM1G16Q2M is set aside as an OTP memory area. This area, available to the user, can be configured and locked with secured user information.

On-chip controller interfaces enable the device to operate in systems without NAND Host controllers.




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