K9F1G16U0M-PIB0

Features:

· Voltage Supply
-1.8V device(K9F1GXXQ0M): 1.70V~1.95V
-3.3V device(K9F1GXXU0M): 2.7 V ~3.6 V
· Organization
- Memory Cell Array
-X8 device(K9F1G08X0M) : (128M + 4,096K)bit x 8bit
-X16 device(K9F1G16X0M) : (64M + 2,048K)bit x 16bit
- Data Register
-X8 device(K9F1G08X0M): (2K + 64)bit x8bit
-X16 device(K9F1G16X0M): (1K + 32)bit x16bit
- Cache Register
-X8 device(K9F1G08X0M): (2K + 64)bit x8bit
-X16 device(K9F1G16X0M): (1K + 32)bit x16bit
· Automatic Program and Erase
- Page Program
-X8 device(K9F1G08X0M): (2K + 64)Byte
-X16 device(K9F1G16X0M): (1K + 32)Word
- Block Erase
-X8 device(K9F1G08X0M): (128K + 4K)Byte
-X16 device(K9F1G16X0M): (64K + 2K)Word
· Page Read Operation
- Page Size
- X8 device(K9F1G08X0M): 2K-Byte
- X16 device(K9F1G16X0M) : 1K-Word
- Random Read : 25ms(Max.)
- Serial Access : 50ns(Min.)
· Fast Write Cycle Time
- Program time : 300ms(Typ.)
- Block Erase Time : 2ms(Typ.)
· Command/Address/Data Multiplexed I/O Port
· Hardware Data Protection
- Program/Erase Lockout During Power Transitions
· Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
· Command Register Operation
· Cache Program Operation for High Performance Program
· Power-On Auto-Read Operation
· Intelligent Copy-Back Operation
· Unique ID for Copyright Protection
· Package :
- K9F1GXXX0M-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9F1G08U0M-VCB0/VIB0
48 - Pin WSOP I (12X17X0.7mm)
- K9F1GXXX0M-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)- Pb-free Package
- K9F1G08U0M-FCB0/FIB0
48 - Pin WSOP I (12X17X0.7mm)- Pb-free Package
* K9F1G08U0M-V,F(WSOPI ) is the same device as
K9F1G08U0M-Y,P(TSOP1) except package type.


Pinout




Description

Offered in 128Mx8bit or 64Mx16bit, the K9F1G16U0M-PIB0 is 1G bit with spare 32M bit capacity. Its NAND cell provides the most costeffective solution for the solid state mass storage market. A program operation can be performed in typical 300ms on the 2112-byte(X8 device) or 1056-word(X16 device) page and an erase operation can be perfor-med in typical 2ms on a 128K-byte(X8 device) or 64K-word(X16 device) block. Data in the data page can be read out at 50ns cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as com-mand input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take
advantage of the K9F1G16U0M-PIB0 extended reliability of 100K program/erase cycles by providing ECC(Error Cor-recting Code) with real time mapping-out algorithm. The K9F1G16U0M-PIB0 is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility.