K7I161882B-FC30

The K7I161882B-FC30 is one member of the K7I1161882B series.The K7I1161882B is 18,874,368-bit DDR Common I/O Synchronou Pipelined Burst SRAM.It is organized as 1,048,576 words by 18 bits for K7I161882B for K7I160882B.The designer can program the SRAM's output buffer impedance by terminating the ZQ pin to VSS  through a precision resistor(RQ).The value of RQ (within 15%) is five times the output impedance desired.

Features of the K7I161882B-FC30 are:(1)pipelined, double-data rate operation; (2)common data input/output bus; (3)HSTL I/O; (4)full data coherency, providing most current data; (5)synchronous pipeline read with self timed late write; (6)registered address, control and data input/output; (7)ddr(double data rate) interface on read and write ports; (8)fixed 2-bit burst for both read and write operation; (9)clock-stop supports to reduce current; (10)two input clocks(K and K) for accurate DDR timing at clock rising edges only; (11)two input clocks for output data(C and C) to minimize clock-skew and flight-time mismatches; (12)two echo clocks (CQ and CQ) to enhance output data traceability; (13)single address bus; (14)byte write (x18, x36) function; (15)programmable output impedance; (16)simple depth expansion with no data contention.

The absolute maximum ratings of the K7I161882B-FC30 can be summarized as:(1)voltage on VDD supply relative to VSS:-0.5 to 2.9V;(2)storage temperature:-65 to 150;(3)operating temperature:0 to 70;(4)voltage on VDDQ supply relative to VSS:-0.5 V to Vdd V;(5)storage temperature range under bias:-10 to 85.Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

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