Features: • 2.5V Power Supply.• LVCMOS compatible with multiplexed address.• Four banks operation.• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).• All inpu...
K4S64323LF-SP: Features: • 2.5V Power Supply.• LVCMOS compatible with multiplexed address.• Four banks operation.• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Bur...
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Features: • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed addre...
Features: • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed addre...
Features: • JEDEC standard 3.3V power supply• LVTTL compatible with multiplexed addres...
Parameter | Symbol | Value | Unit |
Voltage on any pin relative to Vss | VIN, VOUT | -1.0 ~ 3.6 | V |
Voltage on any pin relative to Vss | VDD, VDDQ | -1.0 ~ 3.6 | V |
Voltage on any pin relative to Vss | TSTG | -55 ~ +150 | |
Voltage on any pin relative to Vss | PD | 1 | W |
Voltage on any pin relative to Vss | IOS | 50 | mA |
The K4S64323LF-SP is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG¢s high performance CMOS technology.
Synchronous design of K4S64323LF-SP allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.