K4S64323LF-SP

Features: • 2.5V Power Supply.• LVCMOS compatible with multiplexed address.• Four banks operation.• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).• All inpu...

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SeekIC No. : 004383062 Detail

K4S64323LF-SP: Features: • 2.5V Power Supply.• LVCMOS compatible with multiplexed address.• Four banks operation.• MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Bur...

floor Price/Ceiling Price

Part Number:
K4S64323LF-SP
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

• 2.5V Power Supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
       -. CAS latency (1, 2 & 3).
       -. Burst length (1, 2, 4, 8 & Full page).
       -. Burst type (Sequential & Interleave).
• All inputs are sampled at the positive going edge of the system clock .
• Burst read single-bit write operation.
• DQM for masking.
• Auto & self refresh.
• 64ms refresh period (4K cycle).
• Extended temperature range (-25 to 85). Industrial Temperature range (-40 to 85) for low power.
• 90balls FBGA( -SXXX -Pb, -DXXX -Pb Free).



Specifications

Parameter Symbol Value Unit
Voltage on any pin relative to Vss VIN, VOUT -1.0 ~ 3.6 V
Voltage on any pin relative to Vss VDD, VDDQ -1.0 ~ 3.6 V
Voltage on any pin relative to Vss TSTG -55 ~ +150
Voltage on any pin relative to Vss PD 1 W
Voltage on any pin relative to Vss IOS 50 mA



Description

The K4S64323LF-SP is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG¢s high performance CMOS technology.

Synchronous design of K4S64323LF-SP allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.




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