K4S561632A

Features: • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address• Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)• A...

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K4S561632A Picture
SeekIC No. : 004382955 Detail

K4S561632A: Features: • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address• Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3...

floor Price/Ceiling Price

Part Number:
K4S561632A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Features:

•  JEDEC standard 3.3V power supply
•  LVTTL compatible with multiplexed address
•  Four banks operation
•  MRS cycle with address key programs
      -. CAS latency (2 & 3)
      -. Burst length (1, 2, 4, 8 & Full page)
      -. Burst type (Sequential & Interleave)
•  All inputs are sampled at the positive going edge of the system clock. 
•  Burst read single-bit write operation
•  DQM for masking
•  Auto & self refresh
•  64ms refresh period (8K Cycle)



Pinout

  Connection Diagram


Specifications

Parameter
Symbol
Value
Unit
Voltage on any pin relative to Vss
VIN, VOUT
-1.0 ~ 4.6
V
Voltage on VDD supply relative to Vss
VDD, VDDQ
-1.0 ~ 4.6
V
Storage temperature
TSTG
-55 ~ +150
°C
Power dissipation
PD
1
W
Short circuit current
IOS
50
mA



Description

The K4S561632A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.




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