K4S511632D

JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
     -. CAS latency (2 & 3)
     -. Burst length (1, 2, 4, 8 & Full page)
     -. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the systemclock. 
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (8K Cycle)

The K4S511632D is 536,870,912 bits synchronous high data rateDynamic RAM organized as 4 x 8,392,608words by 16bits, fabri-cated with SAMSUNG's high performance CMOS technology. Syn-chronous design allows precise cycle control with the use ofsystem clock I/O transactions are possible on every clock cycle.Range of operating frequencies, programmable burst length andprogrammable latencies allow the same device to be useful for avariety of high bandwidth, high performance memory system appli-cations.