Features: • Serial Peripheral Interface (SPI) Compatible- Supports SPI Modes 0 (0,0) and 3 (1,1)• Low power CMOS- Active current less than 3.0 mA (2.5V)- Standby current less than 20 A (2.5V)• Low-voltage Operation- Vcc = 1.8V to 5.5V• Block Write Protection- Protect 1/4, 1...
IS25C128: Features: • Serial Peripheral Interface (SPI) Compatible- Supports SPI Modes 0 (0,0) and 3 (1,1)• Low power CMOS- Active current less than 3.0 mA (2.5V)- Standby current less than 20 A (...
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Symbol |
Parameter |
Value |
Unit |
VS |
Supply Voltage |
0.5 to +6.5 |
V |
VP |
Voltage on Any Pin |
0.5 to Vcc + 0.5 |
V |
TBIAS |
Temperature Under Bias |
55 to +125 |
°C |
TSTG |
Storage Temperature |
65 to +150 |
°C |
IOUT |
Output Current |
5 |
mA |
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The IS25C128 and IS25C256 are electrically erasable PROM devices that use the Serial Peripheral Interface (SPI) for communications. The IS25C128 is 128Kbit (16K x 8) and the IS25C256 is 256Kbit (32K x 8). The IS25C128/256 EEPROMs are offered in a wide operating voltage range of 1.8V to 5.5V for compatibility with most application voltages. ISSI designed the IS25C1 28/256 to be an efficient SPI EEPROM solution. The devices are packaged in 8-pin JEDEC SOIC, 8-pin EIAJ SOIC, and 8-pin PDIP.
The functional features of the IS25C128/256 allow them to be among the most advanced serial non-volatile memories available. Each device has a Chip-Select (CS) pin, and a 3-wire interface of Serial Data In (SI), Serial Data Out (SO), and Serial Clock (SCK). While the 3-wire interface of the IS25C128/256 provides for high-speed access, a HOLD pin allows the memories to ignore the interface in a suspended state; later the HOLD pin re-activates communication without reinitializing the serial sequence. A Status Register facilitates a flexible write protection mechanism, and a device-ready bit (RDY).