Features: • 16 differential 3.3V LVPECL outputs• CLK, nCLK input pair• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• Maximum output frequency up to 500MHz• Translates any single-ended input signal to 3.3V LVPECL l...
ICS8530-01: Features: • 16 differential 3.3V LVPECL outputs• CLK, nCLK input pair• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• Ma...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
Supply Voltage, VCCx.............. 4.6V
Inputs, VI ............-0.5V to VCC + 0.5V
Outputs, VO ..........-0.5V to VCCO + 0.5V
Package Thermal Impedance, JA..... 47.9/W
Storage Temperature, TSTG.... . -65 to 150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
The ICS8530-01 is a low skew, 1-to-16 Differential-to-3.3V LVPECL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels. The high gain differential amplifier accepts peak-topeak input voltages as small as 150mV as long as the common mode voltage is within the specified minimum and maximum range.
Guaranteed output and part-to-part skew characteristics make the ICS8530-01 ideal for those clock distribution applications demanding well defined performance and repeatability.