Features: * 24 LVCMOS outputs, 7? typical output impedance* Output frequency up to 167MHz* 275ps output skew, 600ps part to part skew* Translates any differential input signal (PECL, HSTL, LVDS) to LVCMOS without external bias networks* Translates any single-ended input signal to LVCMOS with resis...
ICS8344: Features: * 24 LVCMOS outputs, 7? typical output impedance* Output frequency up to 167MHz* 275ps output skew, 600ps part to part skew* Translates any differential input signal (PECL, HSTL, LVDS) to ...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
The ICS8344 is a low voltage, low skew fanout buffer and a member of the HiPerClockS(TM) family of High Perfor mance Clock Solutions from ICS. The ICS8344 is designed to translate any differential signal levels to LVCMOS levels. The low impedance LVCMOS outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased to 48 by utilizing the ability of the outputs to drive two series termi nated lines. Redundant clock applications can make use of the dual clock input. The dual clock inputs also facilitate board level testing. ICS8344 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes.
Guaranteed output and part-to-part skew characteristics make the ICS8344 ideal for those clock distribution applications demanding well defined performance and repeatability.