Features: • 2-bit, 2:1 single-ended multiplexer• Nominal output impedance: 15 (VDDO = 3.3V)• Maximum output frequency: 250MHz• Propagation delay: 2.5ns (typical)• Input skew: 45ps (typical)• Part-to-part skew: TBD• Additive phase jitter, RMS (12KHz - 20MHz...
ICS83052I-01: Features: • 2-bit, 2:1 single-ended multiplexer• Nominal output impedance: 15 (VDDO = 3.3V)• Maximum output frequency: 250MHz• Propagation delay: 2.5ns (typical)• Input...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
Supply Voltage, VDD | 4.6V |
Inputs, VI | -0.5V to VDD + 0.5 V |
Outputs, VO | -0.5V to VDDO + 0.5 V |
Package Thermal Impedance, JA | 89/W (0 lfpm) |
Storage Temperature, TSTG | -65 to 150 |
Supply Voltage, VDD | 4.6V |
Inputs, VI | -0.5V to VDD + 0.5 V |
Outputs, VO | -0.5V to VDDO + 0.5 V |
Package Thermal Impedance, JA | 89/W (0 lfpm) |
Storage Temperature, TSTG | -65 to 150 |
The ICS83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83052I-01 has two selectable single-ended clock inputs and two single-ended clock outputs. The output has a VDDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage translation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. Possible applications include systems with up to two transceivers which need to be independently set for different rates. For example, a board may have two transceivers, each of which need to be independently configured for 1 Gigabit Ethernet or 1 Gigabit Fibre Channel rates. Another possible application of the ICS83052I-01 may require the ports to be independently set for FEC (Forward Error Correction) or non-FEC rates. The device operates up to 250MHz and is packaged in a 16 TSSOP.