Features: `4 LVCMOS / LVTTL outputs`LVCMOS clock input`CLK can accept the following input levels: LVCMOS, LVTTL`Maximum output frequency: 166MHz`Output skew: 60ps (maximum)`Part-to-part skew: 650ps (maximum)`Small 8 lead SOIC package saves board space`3.3V input, outputs may be either 3.3V or 2.5V...
ICS8304I: Features: `4 LVCMOS / LVTTL outputs`LVCMOS clock input`CLK can accept the following input levels: LVCMOS, LVTTL`Maximum output frequency: 166MHz`Output skew: 60ps (maximum)`Part-to-part skew: 650ps ...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
Supply Voltage, VDDx ....................................................4.6V
Inputs, VI ...............................................-0.5V to VDD+ 0.5V
Outputs, VO ........................................-0.5V to VDDO + 0.5V
Package Thermal Impedance, JA ...........112.7/W (0 lfpm)
Storage Temperature, TSTG ............................-65 to 150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
The ICS8304I is a low skew, 1-to-4 Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8304I is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and part-to-part skew characteristics make the ICS8304I ideal for those clock distribution applications demanding well defined performance and repeatability.