Features: `2 LVCMOS / LVTTL outputs `Differential CLK, nCLK input pair `CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL `Output frequency: 350MHz (typical) `Output skew: 20ps (maximum) `Part-to-part skew: 600ps (maximum) `Small 8 lead SOIC packag...
ICS83026I: Features: `2 LVCMOS / LVTTL outputs `Differential CLK, nCLK input pair `CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL `Output frequency: 350MHz ...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
Supply Voltage, VDD .................. 4.6V
Inputs, VI ................-0.5V to VDD + 0.5 V
Outputs, VO................-0.5V to VDD + 0.5V
Package Thermal Impedance, JA......112.7/W (Olfpm)
Storage Temperature, TSTG ...........-65 to 150
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
The ICS83026I is a low skew, 1-to-2 Differential-to-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS? family of High Performance ClockTM Solutions from ICS.The differential input can accept most differential signal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate to two single-ended LVCMOS/LVTTL outputs with a maximum output skew of 20ps. The small 8-lead SOIC footprint makes this ICS83026I ideal for use in applications with limited board space.