Features: • Two LVCMOS / LVTTL outputs• Two differential CLKx, nCLKx input pairs• CLK, nCLK pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• Maximum output frequency: 350MHz (typical)• Output skew: 60ps (maximum)• Part-...
ICS83023I: Features: • Two LVCMOS / LVTTL outputs• Two differential CLKx, nCLKx input pairs• CLK, nCLK pairs can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HC...
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Features: • Accepts various HD and SD references including hsync,transport and pixel clock r...
Supply Voltage, VDD 4.6V
Inputs, VI -0.5V to VDD + 0.5 V
Outputs, VO -0.5V to VDD + 0.5V
Package Thermal Impedance, JA 112.7°C/W (0 lfpm)
Storage Temperature, TSTG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
The ICS83023I is a dual, 1-to-1 Differential-to- LVCMOS Translator/Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The differential inputs can accept most differential signal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and translate into two single-ended LVCMOS outputs. The small 8-lead SOIC footprint of the ICS83023I makes this device ideal for use in applications with limited board space.