Features: • High-speed access times:-- 8, 10, 12, 15 ns• Automatic power-down when chip is deselected• CMOS low power operation-- 345 mW (max.) operating-- 7 mW (max.) CMOS standby• TTL compatible interface levels• Single 3.3V power supply• Fully static operatio...
IC61LV256: Features: • High-speed access times:-- 8, 10, 12, 15 ns• Automatic power-down when chip is deselected• CMOS low power operation-- 345 mW (max.) operating-- 7 mW (max.) CMOS standby...
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ApplicationUsing this IC socket, developers can connect a 64-pin 0.8 mm-pitch LCC (64D0) package M...
Features: • High-speed access time: 12, 15, 20, 25 ns• Low active power: 600 mW (typic...
Symbol |
Parameter |
Value |
Unit | |
VCC | Power Supply Voltage Relative to GND |
0.5 to +4.6 |
V | |
VTERM | Terminal Voltage with Respect to GND |
0.5 to +4.6 |
V | |
TBIAS | Temperature Under Bias |
Com. Ind. |
10 to +85 45 to +90 |
|
TSTG | Storage Temperature |
65 to +150 |
||
PD | Power Dissipation |
1 |
W | |
IOUT | DC Output Current |
±20 |
mA |
The ICSI IC61LV256 is a very high-speed, low power,32,768-word by 8-bit static RAM. It is fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns maximum.
When CE of the IC61LV256 is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 600 W (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IC61LV256 is available in the JEDEC standard 28-pin,300mil SOJ and the 8*13.4mm TSOP-1 package.