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IC61C1024

Features: • High-speed access time: 12, 15, 20, 25 ns• Low active power: 600 mW (typical)• Low standby power: 500 W (typical) CMOS standby• Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications• Fully static operation: no clock or refres...

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SeekIC No. : 004370398 Detail

IC61C1024: Features: • High-speed access time: 12, 15, 20, 25 ns• Low active power: 600 mW (typical)• Low standby power: 500 W (typical) CMOS standby• Output Enable (OE) and two Chip En...

IC61C1024 Data Sheet

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Part Number:
IC61C1024
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High-speed access time: 12, 15, 20, 25 ns
• Low active power: 600 mW (typical)
• Low standby power: 500 W (typical) CMOS standby
• Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications
• Fully static operation: no clock or refresh required
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Low power version available: IC61C1024L
• Commercial and industrial temperature ranges available


Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VTERM Terminal Voltage with Respect to GND
0.5 to +7.0
V
TBIAS Temperature Under Bias
55 to +125
TSTG Storage Temperature
65 to +150
PT Power Dissipation
1.5
W
IOUT DC Output Current (LOW)
20
mA
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.


Description

The ICSI IC61C1024 and IC61C1024L are very high-speed,low power, 131,072-word by 8-bit CMOS static RAMs. They are fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.

When CE1 of the IC61C1024 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IC61C1024 and IC61C1024L are available in 32-pin 300mil SOJ, and 8*20mm TSOP-1, and 8*13.4mm TSOP-1 packages.




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