HYS72T128x20HU

• 240-Pin PC26400, PC25300, PC24200 and PC23200 DDR2 SDRAM memory modules.
• 32M * 64, 64M * 64, 64M * 72, 128M * 64 and 128M *72 module organization and 32M * 16, 64M * 8 chip organization
• Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply
• 256MB, 512MB and 1GB modules built with 512-Mbit DDR2 SDRAMs in P-TFBGA-84 and P-TFBGA-60 chipsize packages
• All speed grades faster than DDR2400 comply with DDR2400 timing specifications.
• Programmable CAS Latencies (3, 4 and 5),Burst Length (8 & 4) and Burst Type
• Auto Refresh (CBR) and Self Refresh
• Programmable self refresh rate via EMRS2 setting
• Programmable partial array refresh via EMRS2 settings
• Average Refresh Period 7.8 s at a TCASE lower than 85 °C, 3.9s between 85 °C and 95 °C.
• DCC enabling via EMRS2 setting
• All inputs and outputs SSTL_1.8 compatible
• Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT)
• Serial Presence Detect with E²PROM
• UDIMM Dimensions (nominal):30 mm high, 133.35 mm wide
• Based on standard reference layouts Raw Card "C","D","E","F" and "G"
• RoHS compliant products1)

1) When V_DD and V_DDQ and V_DDL are less than 500 mV; V_REF may be equal to or less than 300 mV.
2) Storage Temperature is the case surface temperature on the center/top side of the DRAM.
  Attention: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The Qimonda HYS72T128x20HU module family are unbuffered DIMM modules "UDIMMs" with 30 mm height based on DDR2 technology. DIMMs are available as non-ECC modules in 32M * 64 (256 MB), 64M * 64 (512 MB), 128M * 64(1 GB) and as ECC modules in 64M * 72 (512 MB), 128M * 72(1 GB) organization and density, intended for mounting into 240-pin connector sockets.

The memory array of the HYS72T128x20HU is designed with 512-Mbit Double-Data-Rate-Two (DDR2) Synchronous DRAMs. Decoupling capacitors are mounted on the PCB board. The DIMMs feature serial presence detect based on a serial E²PROM device using the 2-pin I²C protocol. The first 128 bytes of the HYS72T128x20HU are programmed with configuration data and are write protected; the second 128 bytes are available to the customer.